Ge p-MOSFETs Compatible with Si CMOS-Technology
In: ESSDERC'99 : Proceedings of the 29th European solid-state device research conference / Maes,, H.E.; Mertens, R.P.; Declerk, G. (Hrsg.)
Leuven, Belgium,13-15 september: Neuilly (1999), S. 300-303
ISBN: 2863322451, 9782863322451
Buchaufsatz / Kapitel / Fach: Physik
Fakultät für Physik » Experimentalphysik
High-mobility Ge p-MOSFETs with relaxed high-quality Ge channel layers directly grown on silicon substrates by surfactant- mediated epitaxy (SME) have been realised. The devices with 30 nm thick LPCVD gate oxides were fabricated with a low-temperature self-aligned W-gate process which is compatible with conventional Si CMOS technology. The influence of a Si cap layer with 0 to 10 11m thickness on top of the Ge channel layer under the gate oxide was investigated yielding a strong increase of saturation transconductance and effective p-channel mobility with decreasing cap layer thickness. For 2 nm Si cap layer devices the intrinsic saturation transconductance reached a maximum of 46 mSlmm (at LG = 1 J.Il1'l) and an effective p-channel mobility value of 31 0 cm21Vs at large gate voltages, which exceeds the mobilities of any pMOSFET fabricated on a silicon substrate
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